Anterwell Technology Ltd.
Large Original stock of IC Electronics Components, Transistors, Diodes etc.
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Drain-source Voltage: | 500 V | Gate-source Voltage: | ± 30 V |
---|---|---|---|
Drain Current (continuous) At TC = 25 °C: | 11 A | Drain Current (pulsed): | 44 A |
Peak Diode Recovery Voltage Slope: | 4.5 V/ns | Operating Junction Temperature: | -55 To 150 °C |
High Light: | npn smd transistor,multi emitter transistor |
STF13NK50Z, STP13NK50Z, STW13NK50Z
N-channel 500 V, 0.40 Ω, 11 A TO-220, TO-220FP, TO-247 Zener-protected SuperMESHTM Power MOSFET
Features
Type | VDSS | RDS(on) max | ID | Pw |
STF13NK50Z | 500 V | <0.48 Ω | 11 A | 30 W |
STP13NK50Z | 500 V | <0.48 Ω | 11 A | 140 W |
STW13NK50Z | 500 V | <0.48 Ω | 11 A | 140 W |
■ Extremely high dv/dt capability
■ 100% avalanche tested
■ Gate charge minimized
■ Very low intrinsic capacitances
■ Very good manufacturing repeatability
Applications
■ Switching application
Description
The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs.
Absolute maximum ratings
Symbol | Parameter | Value | Unit | |
TO-220, TO-247 | TO-220FP | |||
VDS | Drain-source voltage (VGS = 0) | 500 | V | |
VGS | Gate-source voltage | ± 30 | V | |
ID | Drain current (continuous) at TC = 25 °C | 11 | 11(1) | A |
ID | Drain current (continuous) at TC=100 °C | 6.93 | 6.93(1) | A |
IDM(2) | Drain current (pulsed) | 44 | 44(1) | A |
PTOT | Total dissipation at TC = 25 °C | 140 | 30 | W |
Derating factor | 1.12 | 0.24 | W/°C | |
dv/dt(3) | Peak diode recovery voltage slope | 4.5 | V/ns | |
VISO | Insulation withstand voltage (RMS) from all three leads to external heat sin (t=1 s;TC= 25 °C) | 2500 | V | |
TJ Tstg | Operating junction temperature Storage temperature | -55 to 150 | °C |
1. Limited only by maximum temperature allowed
2. Pulse width limited by safe operating area
3. ISD ≤ 11 A, di/dt ≤ 200 A/µs, VDD ≤ 80% V(BR)DSS
Internal schematic diagram
Stock Offer (Hot Sell)
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